Zhenlong Ma

System Software Engineer at NVIDIA

Previously, I worked at the Institute of Computing Technology, Chinese Academy of Sciences, focusing on high-performance networking and RDMA systems. My research covered RNIC architecture design, traffic scheduling and isolation, resource prefetching, multipath transmission, and communication optimization for large-scale clusters. My work has been published in international conferences and journals such as HPCC and IEEE CAL. I also contributed to the High-Throughput Ethernet Interconnect Protocol (ETH+) standard and the Scale-Up interconnect protocol whitepaper. I am currently working at NVIDIA on communication library development and optimization.